Samsung Electronics again otraportovala on their achievements in the field of electronics. This time, South Korean manufacturer proudly described the establishment of the lowest in the industry dvuhgigabitnyh DDR3-memory chips. New items are designed taking into account the 50-nm rules ahead of a 60% performance DDR2 chips with the same density and can save up to 40% of electricity compared to typical Gigabit DDR3-chips.
As noted, using 2-Gbit chips Samsung manufacturers can design RIMM memory capacity of up to 16 GB using dvuhkristallnyh packages (dual-die packages). With a standard layout developers can create modules RIMM capacity up to 8 GB, as well as modules and SODIMM UDIMM capacity up to 4 GB. Data transfer rate of new memory chips reaches 1, 3 Gb/s.
Samsung hopes that next year the majority of its DRAM-chips will be on 50-nm tehprotsessu. Mass production of 50-nm 2-Gbit chip is scheduled for later this year.
Recall, in 2000, Samsung produced DRAM-memory 150-nm design rules, and the first application of 50-nm technology for DRAM production was announced in April this year with the announcement of new Gigabit DDR2 chips.
According to the research group IDC, by 2011 the proportion of DDR3-DRAM chips on the market at 72%. In addition, the 2-Gigabit chips, which will hold on the market only 3% in 2009, will become more popular and by 2011 they occupy 33% of the market.
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