Intel Xeon with six kernels Announces September 15
September 4, 2008, 6:04 pm
It is expected that the September 15, Intel will officially present Xeon server processor 7400 Dunnington, who will become the first shestiyadernym chip in the world and the last representative of a family of Penryn - claimed sources close to producers servers. In the future, will replace Penryn processors built on the base architecture Nehalem, its debut on the market will be presented chip Core i7, planned to enter the fourth quarter of this year. In their speeches at the last IDF Intel vice president Pat Gelsinger (Pat Gelsinger) said that the announcement of servers based Dunnington preparing Sun Microsystems, Hewlett-Packard and Dell. Most likely, also released similar products by IBM and Unisys. Vydayuschuyusya productivity Xeon 7400 should provide six cores and 16 MB shared memory cache. In addition, the new chip is noteworthy in that it will be the first in the practice of implementing Intel monolithic design, in which all the kernels will be located on a single crystal. Dunnington will be processed at 45 nm high-k technology in the performance mPGA 604, and maintain compatibility of contacts with quad-Tigerton. Recall that the chips are Dunnigton solutions for multiprocessor servers. The production uses Intel chips shestiyadernyh 45 - nm technology, using metal closures and High-K dielectrics, which will deploy in one crystal 1, 9 billion transistors. All six nuclei together with arrays of cells accommodate the cache memory on a single crystal, although some observers previously believed that Intel simply Qty. p. pck three dual-core Wolfdale crystal in a corpus. In processors Dunnington applied the concept of tiered shared cache. At every couple of kernels accounted for one cell array cache memory capacity of second-level 3 Mb, respectively, the total amount of L2 cache reaches 9 MB. Also at the crystal accommodate a shared third-level cache, capacity will be up to 16 MB. Note that predecessors Dunnington, Quad Xeon 7300 series chips (Tigerton) for multiprocessor servers, are up to 8 MB cache L3. Other technical features of Dunnington, known today, we note FSB bus with a capacity 1066 megatranzaktsy per second, 40 scheme - bit addressing physical memory;habitual korpusirovku mPGA604;TDP 130 W;support virtualization technology VT FlexMigration compatibility with more capabilities and support migration on the future platform architecture or subsequent Core microarchitecture.